CMOS Imaging Sensor with top-class S/N ratio Laser Backside junction formation avoids costly epi layer and improve device performance by melt and sub-melt mediated dopant activation process Fill factor brought to 100%.Melt mediated re-crystallization and activation leading to overlap free and uniform process over the whole device sensitive area.

Key features:

• Shallow junction formation
• Integrity of underlying metal layers and devices
• Full defect annealing
• High activation rate
• Uniform activation on processed areas
• APMC® Real time in-situ process control